Notes about interrupt and exceptions

1. Interrupt vs exceptions

Source: Intel Developer Manual Vol. 3A

1.1. Interrupt

Interrupts occur at random times during the execution of a program, in response to signals from hardware. System hardware uses interrupts to handle events external to the processor, such as requests to service peripheral devices. Software can also generate interrupts by executing the INT n instruction.

Source of interrupts:

  • External (hardware)
  • Internal (software, int)

    Maskable:

Any external (hardware) interrupt that is delivered to the processor by means of the INTR pin or through the local APIC is called a maskable hardware interrupt.

¿ Mask: disable | Unmask: enable ? (Has to be 100% checked)

1.2. Exceptions

Exceptions occur when the processor detects an error condition while executing an instruction, such as division by zero. The processor detects a variety of error conditions including protection violations, page faults, and internal machine faults.

Source of exceptions:

  • Processor-detected program-error exceptions.
  • Software-generated exceptions.
  • Machione-check exceptions

Exceptions are classified as:

  • Faults (can be restored)
  • Traps (can be continued, just stopped)
  • Aborts (severe errors)

2. Allocation of vector numbers

Source: Intel Developer Manual Vol. 3A

The allowable range for vector numbers is 0 to 255. Vector numbers in the range 0 through 31 are reserved by Intel 64 and IA-32 architectures for architecture-defined exceptions and interrupts.

Vector numbers in the range 32 to 255 are designated as user-defined interrupts.

3. APIC compatible with PIC

Source: https://alex.dzyoba.com/blog/os-interrupts

But for backward compatibility, APIC emulates good ol’ 8259 PIC. So if you’re not on an ancient hardware, you actually have an APIC that is configured in some way by you or BIOS.